300ma adjustable high psrr cmos linear regulator 2007-4-19 1/8 FSP2133 ? applications z cordless phones z cellular phones z bluetooth earphones z digital cameras z portable electronics z wlans z mp3 players ? pin configuration (top view) ? pin description ? block diagram pin number pin name pin function 1 vin input 2 gnd ground 3 en chip enable (active high) 4 adj adjustable pin 5 vout output ? features z low dropout voltage: 180mv at 300ma (vo=3.3v) z quiescent current: typ. 65a z 2% voltage accuracy z high psrr: 67db at 100hz z thermal shutdown z current limiting z excellent line and load regulation z fast response z short circuit protection z low temperature coefficient z shutdown current: 0.5a z space saving sot23-5l package ? general description the FSP2133 is a positive adjustable voltage linear regulator features low quiescent current (typ . 65a) and low dropout voltage, making it ideal for battery powered applications. their high psrr make them useful in applications where ac noise on the input power supply must be suppressed. space saving sot23-5l package is attractive for portable and handheld applications. they have both thermal shutdown and a current limit feature to prevent device failure from extreme operating conditions. they are stable with an output capacitor of 2.2f or greater. 5 4 1 2 3
300ma adjustable high psrr cmos linear regulator 2007-4-19 2/8 FSP2133 ? typical applications circuits ? absolute maximum ratings parameter rating unit input supply voltage +6 v output current 300 ma output pin voltage gnd-0.3 to vin+0.3 v internal power dissipation 400 mw junction to case thermal resistance ( jc ) 130 / w junction to ambient thermal resistance ( ja ) 250 / w operating temperature -40 to 85 c operating junction temperature -40 to 125 c storage temperature -65 to 150 c lead temperature (soldering, 5 sec) 300 c note: absolute maximum ratings are those values beyond which the life of a device may be impaired.
300ma adjustable high psrr cmos linear regulator 2007-4-19 3/8 FSP2133 ? electrical characteristics (v in = 4v, v o = 3v, c in = 1 f, c o = 2.2 f, t a = 25 c unless otherwise specified.) parameter symbol test conditions min typ max unit input voltage v in note1 5.5 v output voltage v o 1.2 5 v reference voltage v ref 1.235 v output voltage accuracy v o i o = 1ma -2 +2 % output current i o 300 note2 ma short circuit current i sc v o = 0v 150 ma ground current i gnd i o = 1ma to 300ma 70 90 a quiescent current i q i o = 0ma 65 90 a line regulation lnr i o = 1ma, v in =3v to 5v -0.4 0.2 0.4 %/v load regulation error ldr i o = 1ma to 300ma -1 0.2 1 % temperature coefficient t c i o = 1ma 40 ppm/ c over temperature shutdown ots i o = 1ma 150 c over temperature hystersis oth i o = 1ma 30 c f=100hz 67 f= 1khz 65 power supply ripple rejection psrr i o = 100ma v o =1.2v f= 10khz 42 db 2.5 v o < 3.3v 370 450 dropout voltage v do i o = 300ma v o 3.3v 180 230 mv en input high threshold v ih v in = 2.5v to 5v 1.5 v en input low threshold v il v in = 2.5v to 5v 0.3 v output noise v n f = 10hz to 100khz 50 v rms shutdown current i sd v en = 0v 0.01 1 a note 1 the minimum input voltage of the FSP2133 is deter mined by output voltage and dropout voltage. the minimum input voltage is defined as: v in(min) =v o +v drop note 2 output current is limited by p d , maximum i o =p d /(v in(max) -v o )
300ma adjustable high psrr cmos linear regulator 2007-4-19 4/8 FSP2133 ? application information capacitor selection and regulator stability similar to any low dropout regulator, the external capaci tors used with the FSP2133 must be carefully selected for regulator stability and performance. using a capacitor, c in , whose value is 1uf at the FSP2133 input pin, the am ount of the capacitance can be increased without limit. please note that the distance between c in and the input pin of the FSP2133 should not exceed 0.5 inch. ceramic capacitors are suitable for the FSP2133. capacitors with larger values and lower esr provide better psrr and line-transient response. the FSP2133 is designed specifically to work with low esr ceramic output capacitors in order to save space and improve performance. using an output ceramic capacitor whose value is 2.2 f with esr 5m ? ensure stability. adj output voltage programming the output voltage of the FSP2133 adjustable regulator is programmed by using an external resistor divider as shown in figure 1. the output voltage is calculated using: resistor r1 and r2 should be chosen for approximately 7ua divider current. low value resistors can be used but offer no advantage and waste more power. higher value should be avoided as leakage current at adj pin increase the output voltage error. cc is unnecessary when r1 or r2 20k. the recommended design procedure is to choose r2=169k ? to set the divider current at 7ua and then calculated r1 using: load transient considerations the figure7 shows the FSP2133 load transient response. it shows two components the output response: a dc shift from the output impedance due to the load current change and tr ansient response. the dc shift is quite small due to excellent load regulation of the FSP2133. the transient spik e, resulting from a step change in the load current from 1ma to 300ma, is 20mv. the esr of the output capacitor is cr itical to the transient spike. a larger capacitance along with smaller esr results in a smaller spike. shutdown input operation the FSP2133 is shutdown by pulling the en input low, and is turned on by tying the en i nput to vin or leaving the en input floating. internal p-channel pass transistor the FSP2133 features a 0.75 ? p-channel mosfet device as a pass transistor. the p-mos pass transistor enables the FSP2133 to consume only 65 a of ground current during low dropout, light load, or heavy load operations. this feature increase s the battery operation life time. dropout voltage a regulator?s minimum dropout voltage determines the lo west usable supply voltage. the FSP2133 has a typical 300mv dropout voltage. in battery power ed systems, this will determine the useful end-of-life battery voltage. current limit and short circuit protection the FSP2133 features a current limit, which monitors and cont rols the gate voltage of the pass transistor. the output current can be limited to 400ma by regulating the gate volt age. the FSP2133 also has a built-in short circuit current limit. thermal considerations thermal protection limits power dissipation in the FSP2133. when the junction temperature exceeds 150 , the otp (over temperature protection) starts the thermal shutdown and turns the pass transistor off. the pass transistor resumes operation after the junction temperature drops below 120 . for continuous operation, the junction te mperature should be maintained below 125 . the power dissipation is defined as : p d =(v in -v out )*i o +v in *i gnd the maximum power dissipation depends on the thermal resi stance of ic package, pcb layout, the rate of surrounding airflow and temperature difference between ju nction and ambient. the maximum power dissipation can be calculated by the following formula: p d(max) =(t j(max) -t a )/ ja where t j(max) is the maximum allowable junction temperature 125 . t a is the ambient temperature and ja is the thermal resistance from the junction to the ambient. for example, ja is 250 /w for the sot23-5l package, based on the standard jedec 51-3 for a single layer thermal test board. the maximum power dissipation at t a =25 can be calculated by the following formula: p d(max) = (125 -25 )/250=0.4w it is also useful to calculated the junction temperature of the FSP2133 under a set of specific conditions. in this
300ma adjustable high psrr cmos linear regulator 2007-4-19 5/8 FSP2133 example let the input voltage v in =3.3v, the output current i o =300ma and the case temperature t a =40 measured by a thermal couple during operation. the power dissipation for the v o =2.8v version of the FSP2133 can be calculated as: p d =(3.3v-2.8v)*300ma+3.3v*70 a 150mw and the junction temperature, t j , can be calculated as follows: t j =t a +p d * ja t j =40 +0.15w*250 /w =77.5 t j(max) =125 for this operating condition, tj, is lower than t he absolute maximum operating junction temperature, 125 , so it is safe to use the FSP2133 in this configuration. ? typical performance characteristics (v 0 = 1.2v, c in = 1 f, c o = 2.2 f , t a = 25c unless otherwise specified.)
300ma adjustable high psrr cmos linear regulator 2007-4-19 6/8 FSP2133 ? typical performanc e characteristics continued (v 0 = 1.2v, c in = 1 f, c o = 2.2 f , t a = 25c unless otherwise specified.)
300ma adjustable high psrr cmos linear regulator 2007-4-19 7/8 FSP2133 ? typical performanc e characteristics continued (v 0 = 1.2v, c in = 1 f, c o = 2.2 f , t a = 25c unless otherwise specified.) ? ordering information ? marking information xxvyw date code: y: year w; week output voltage: a: adj product code FSP2133xxxx package type: c: sot23-5l packing: a: tape & reel output voltage: blank: adj temperature grade: d: -40~85
300ma adjustable high psrr cmos linear regulator 2007-4-19 8/8 FSP2133 ? package information dimensions in millimeters dimensions in inches symbol min. max. min. max. a 0.889 1.295 0.036 0.052 a1 0.000 0.152 0.000 0.006 b 0.353 0.599 0.014 0.024 d 2.692 3.099 0.108 0.124 e 2.591 2.977 0.104 0.119 e1 1.397 1.803 0.056 0.072 e 0.838 1.041 0.034 0.042 d e b e1 e 5 4 3 2 1 a a1
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